Testable Sequential Circuits using Conservative Toffoli
K.rekha Swathi Sri, M.mano and M.mohanaarasi. Article: Testable Sequential Circuits using Conservative Toffoli. IJCA Proceedings on International Conference on Innovations in Information, Embedded and Communication Systems ICIIECS(1):34-38, November 2014. Full text available. BibTeX
@article{key:article,
author = {K.rekha Swathi Sri and M.mano and M.mohanaarasi},
title = {Article: Testable Sequential Circuits using Conservative Toffoli},
journal = {IJCA Proceedings on International Conference on Innovations in Information, Embedded and Communication Systems},
year = {2014},
volume = {ICIIECS},
number = {1},
pages = {34-38},
month = {November},
note = {Full text available}
}
Abstract
Testing of Sequential circuits can be done by two test vectors (all 1's and all 0's) if the circuits were based on the conservative logic. The circuit is made to be tested by designing the circuit with the help of Reversible logic gates. Toffoli gate is used as reversible gate in this paper. Sequential circuits such as latches, flip flops are designed with the help of conservative logic reversible gate. Therefore, testing does not require any scan path access to the internal memory cell since only normal mode and test mode are required for testing. Equivalent circuit of the Toffoli gate is presented which achieves the fault coverage. The objective of this paper is to reduce the number of test vectors. Fault coverage is also achieved rather than designing the circuit with fredkin gate. Power consumption may also reduce when compared with the fredkin gate.
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